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MOS Based Adder Design for Multiplication Algorithms

Language EnglishEnglish
Book Paperback
Book MOS Based Adder Design for Multiplication Algorithms Afshan Amin Khan
Libristo code: 19345985
Publishers LAP Lambert Academic Publishing, November 2017
"One among the current trends in VLSI design is to minimize implementation area either by decreasing... Full description
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"One among the current trends in VLSI design is to minimize implementation area either by decreasing the feature size or by decreasing the number of devices used to achieve the desired operation. However while doing so it is expected that the voltage value of the designated outputs gets degraded, due to which they might not be suitable for cascaded circuit design. Thus this work provided some basic design strategies that help us achieve circuit minimization of an adder circuit keeping in view its capability of driving the following cascaded stages in applications such as multiplier circuits."

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About the book

Full name MOS Based Adder Design for Multiplication Algorithms
Language English
Binding Book - Paperback
Date of issue 2018
Number of pages 60
EAN 9786137382219
Libristo code 19345985
Weight 107
Dimensions 150 x 220 x 4
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