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Single Chip Low Power Implementation of an Asynchronous FFT Algorithm for Space Applications

Name: Single Chip Low Power Implementation of an Asynchronous FFT Algorithm for Space Applications
Brand: Biblioscholar
SKU: 08141720
Price: 7225 HUF
Availability: InStock
Author: Bruce W Hunt
ISBN: 9781249584247

Bruce W Hunt

Language

English

Book Paperback

Libristo code: 08141720

Publishers Biblioscholar, October 2012

A fully asynchronous fixed point FFT processor is introduced for low power space applications. The a... Full description

Libristo code: 08141720

48 b

7 225 Ft

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A fully asynchronous fixed point FFT processor is introduced for low power space applications. The architecture is based on an algorithm developed by Suter and Stevens specifically for a low power implementation. The novelty of this architecture lies in its high localization of components and pipelining with no need to share a global memory. High throughput is attained using large numbers of small, local components working in parallel. A derivation of the algorithm from the discrete Fourier transform is presented followed bya discussion of circuit design parameters; specifically, those relevant to space applications. The generic architecture is explained with a survey of the 16-point FFT architecture specific to this project. An implementation, which included a test chip fabricated through MOSIS, is described. Finally, simulation results based on layout extractions are presented and an outline for future work is given.