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Semiconductor Memory Testing

Fault Models and Test Considerations for High Performance Embedded SRAM's

Language EnglishEnglish
Book Paperback
Book Semiconductor Memory Testing Anuj Gupta
Libristo code: 06827526
Publishers VDM Verlag Dr. Müller, November 2008
Stringent test quality requirements, at-speed test limitations & total cost associated with using ex... Full description
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Stringent test quality requirements, at-speed test limitations & total cost associated with using expensive off-chip testers for embedded memory testing have forced system designers to introduce on-chip Memory Built-in Self Test (MBIST) techniques to generate, apply, read and compares test patterns in order to expose subtle defects of SRAM''s. The book discusses in detail the various fault models and test requirements associated with embedded SRAM s in today s System-On-Chip s and focuses on the implementation of testing algorithms for embedded SRAMs in the MBIST engine. The book also discusses a finding where failure analysis and silicon debug required an update to the algorithms and pattern backgrounds implemented in the MBIST.

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About the book

Full name Semiconductor Memory Testing
Author Anuj Gupta
Language English
Binding Book - Paperback
Date of issue 2009
Number of pages 64
EAN 9783639194401
Libristo code 06827526
Weight 114
Dimensions 151 x 4 x 10
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