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Power-Constrained Testing of VLSI Circuits

Name: Power-Constrained Testing of VLSI Circuits
Brand: Springer-Verlag New York Inc.
SKU: 01417851
Price: 40519 HUF
Availability: InStock
Author: Nicola Nicolici
ISBN: 9781402072352

Nicola Nicolici

Bashir M. Al- Hashimi

Language

English

Book Hardback

Libristo code: 01417851

Publishers Springer-Verlag New York Inc., February 2003

Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to imp... Full description

Libristo code: 01417851

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40 519 Ft

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Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. While many techniques have investigated power minimization during the functional (normal) mode of operation, it is important to examine the power dissipation during the test circuit activity is substantially higher during test than during functional operation. For example, during the execution of built-in self-test (BIST) in-field sessions, excessive power dissipation can decrease the reliability of the circuit under test due to higher temperature and current density.§Power-Constrained Testing of VLSI Circuits focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. The first part of this book surveys the existing techniques for power constrained testing of VLSI circuits. In the second part, several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths are presented.